Linear scan register allocation on SSA

(bernsteinbear.com)

34 points | by surprisetalk 4 days ago ago

4 comments

  • o11c 4 hours ago ago

    > In fact, you might even consider not allocating a register greedily. What might that look like? I have no idea.

    One case I'm aware of: if your ISA supports arbitrary memory operands like x86, rarely-used variables can be operated-on entirely on the stack. Historically this was something ICC did better than GCC, though it became much less relevant with the shift to 64-bit bringing more registers.

    • mtklein 18 minutes ago ago

      I found this especially nice working with large SIMD constants.

    • fanf2 an hour ago ago

      Most x86 instructions only support one memory operand so you can’t completely avoid register allocation. It isn’t a full-on hardcore CISC like 68k or VAX.

  • fuhsnn 3 days ago ago

    Another great overview of Go compiler's register allocation: https://developers.redhat.com/articles/2024/09/24/go-compile...